FPGA and other programmable logic ICs

FPGA is an integrated circuit that contains many (64 to over 10,000) identical logic cells that can be viewed as standard components. Each logic cell can independently take on any one of a limited set of personalities. The individual cells are interconnected by a matrix of wires and programmable switches. A user's design is implemented by specifying the simple logic function for each cell and selectively closing the switches in the interconnect matrix. Complex designs are created by combining these basic blocks to create the desired circuit.

Field Programmable means that the FPGA's function is defined by a user's program rather than by the manufacturer of the device. Depending on the particular device, the program is either 'burned' in permanently or semi-permanently as part of a board assembly process, or is loaded from an external memory each time the device is powered up.

FPGA links

Information on Field Programmable Gate Array chips and related techniques.

General information

• EDA tools bridge the system-on-programmable-chip design gap - Once relegated to low-cost, low-capability products, EDA tools for PLD development are becoming more complex to keep up with the increased capacity of the devices.
• EDN Programmable-logic directory - The second annual EDN PLD directory highlights the architectures available for your next design. Find out what's new, what's obsolete, and what's evolved in PALs, PLDs, and FPGAs.
• Field-programmable devices - field-programmable devices come in a variety of fruity flavors, and more are arriving all the time
• FPGA Basics
• FPGA related WWW Links - large general link collection
• FPGAs: a matter of cores - portable logic blocks, or cores, have become an accepted part of ASIC design but using cores in FPGAs presents a new set of challenges
• FPGAs and ASICs - This web site is dedicated to the design and use of programmable and quick-turn technologies for space flight applications
• FPGAs "DiSP"lay their processing prowess - Does the performance-power-price product of your software-centric approach no longer compute? Do you need a nimbler platform than a hard-wired ASIC can provide? Programmable logic may be your answer, but carefully calculate the trade-offs to correctly solve your problem.
• FPGA Vendors
• General Comparison of Programmable Logic Architectures - CPLDs vs. FPGAs
• PLD-design methods migrate existing designs to high-capacity devices - moving to newer higher capacity programmable devices can give you higher density and better performance
• Programmable logic: Beat the heat on power consumption - Higher performanceand gate countsincrease programmable-logic powerconsumption. Wise device selection and design techniques can significantly improve your chances of coming in under the powerbudget.
• Reconfigurable logic: built-in adaptability
• Reconfigurable logic: hardware speed with software flexibility - reconfigurable logic lets you dynamically alter hardware in real time, blurring the boundary between hardware and software

Resource pages

• DN's Third Annual Programmable-Logic Directory - EDN's PAL, PLD, and FPGA directory highlights the architectures available for your next design. Find out what's new, what's obsolete, and what's evolved in PALs, PLDs, and FPGAs.
• Emacs Modes for Hardware Languages - This page provides links to existing Emacs modes for languages used in hardware design.
• Opencores.org - This is a good site containing free (GPL) tested Verilog/VHDL models.
• SOCworks - Site to explore and simulate your System-On-Chip (SOC) ideas and architectures using real vendor IP.

Design tips

General

• Bringing Parallel Processing to FPGA Designs
• CPLDs readily replace precious µP resources - using CPLDs to offload your CPU lets you create a device that hits an effective performance and cost balance between the conflicting attributes of standard and custom parts
• Detailed model shows FPGAs' true costs - an analysis of all the variables affecting IC development shows that FPGAs are extremely cost-effective at surprisingly high production volumes
• FPGA makes simple FIFO - FPGA-based, synchronous FIFO that uses the same clock for read and write operations
• General Cooking Guidelines for "cooking" up designs with the Spartan-II Family of FPGAs
• Moving beyond programmable logic: if, when, how? - decision to migrate from PLDs and FPGAs to lower cost ASICs seems easy at first glance but may be more complicated than you think, do a little research and analysis before you proceed, and carefully choose which migration path to follow
• Navigating Through FPGA Designs - The FPGA design process is not as seamless as one might like. However, powerful synthesis, simulation, and programming tools are here to help.
• Navigating Through FPGA Design - FPGA design process is not as seamless as one might like
• PLD code reveals pc-board revisions - The PLD code described in this article implements a pc-board-level revision-detection system that detects whether PLD pins are shorted together on a pc board. It is often advantageous to field a single PLD programming file that works for several generations of physical hardware. The PLD needs to understand what the board revision is, so that it can enable or disable functions, pins, or both to external circuitry.
• Schmitt Trigger - an idea for cleaning up a noisy clock without resorting to an additional external gate or using an additional internal clock, uses one extra pin and two resistors
• Sequence Control using Programmable Logic - A conceptual level approach, available in modern design tools is used to simplify the task.
• Supply-Voltage Migration, 5V to 3.3V - general notes how it affects FPGA base designs
• The best (or worst?) of both worlds -programmable-logic devices deliver design, manufacturing, and after-sale-service flexibility that ASICs can't match, but CPLDs and FPGAs also run more slowly, burn more power, and cost more per gate, there is emerging one-chip ASIC/programmable-logic hybrid solutions
• Your core, my design, our problem - Integrating third-party cores into a design requires more than just reading a data sheet. Virtual components can greatly enhance design productivity or doom a project to failure, and many factors determine the final outcome. To ensure success, the core provider must become a trusted member of the design team.

Arimethics using FPGAs

• A Survey of CORDIC Algorithms for FPGAs - this paper describes the CORDIC algorithm in layman's terms, and discusses implementation issues specific to FPGAs, working copy in pdf format
• Distributed Arithmetic - powerful technique for reducing the size of a parallel hardware multiply-accumulate that is well suited to FPGA designs
• Multiplication in FPGAs - multiplication is basically a shift add operation, but there are variations how to do it, this document is a brief tutorial on multiplication hardware
• The CORDIC Algorithm - class of shift-add algorithms for rotating vectors in a plane

Counters

• PLD code creates PWM generators - This PLD (programmable-logic-device) code creates arbitrary-resolution, pulse-width-modulated (PWM) generators. PWM generators are useful as low-bandwidth D/A converters in hardware of microprocessor-based systems. When you pass it through a simple RC lowpass filter, a PWM waveform becomes a voltage that's approximately equal to the PWM duty cycle times the supply voltage. This code is written for Altera's devices, but you can quite easily translate the design structure and flow into VHDL or Verilog.
• Preprocessor for rotary encoder uses PAL - Rotary encoders usually provide quadrature pulses that indicate both the amount of rotation and the direction. This application idea helps keeping accurate track of rotary encoder position.
• XAPP052: Efficient Shift Registers, LFSR Counters and Long Pseudo-Random Sequence Generators - FPGA application note from Xilinx in pdf format

Oscillator

• VCO uses programmable logic - A VCO (voltage-controlled oscillator) is an analog circuit, so you cannot find it in the libraries for the design of digital programmable chips. When you need such a circuit for synchronization or clock multiplication, you need to find a circuit that works with the standard digital functions, such as AND and NAND. Several possibilities exist for building variable-frequency oscillators. This design modifies a two-NOR-gate RC oscillator to function as a VCO.

Signal processing using FPGAs

Digital signal processing has traditionally been done using enhanced microprocessors but recent increases in Field Programmable Gate Array performance and size offer a new hardware acceleration opportunity.

• A Dynamic Hardware Video Processing Platform - paper examines use of an FPGA as the processing element in a video processing system, pdf format
• DSP design tools target FPGAs - fast DSP algorithms demand a hardware implementation
• DSP woth FPGAs - nice tutorial document collection
• Fastand flexible: FIR filters in reconfigurable logic - reconfigurable logic lets you implement DSP functions in hardware, providing a mix of speed and design flexibility that isn't available in DSPs or mask-programmed ASICs, filter design tools make design tasks easy
• FIR filter fits in an FPGA: A bit serial Approach - presentation of design techniques to realize a 27 tap 12 bit FIR filter in a single FPGA, pdf format
• Implement DSP functions in FPGAs to reduce cost and boost performance - a programmable DSP isn't always the best choice to implement a signal-processing function, such as an FIR filter or Viterbi decoder
• Modulation and Demodulation Techniques for FPGAs - presentation slides from a presentation of digital demodulation for FPGAs, includes implementation of an IS-95 North American Cellular Modem in a Xilinx 4013 as an example
• Soft Radios and Modems on FPGAs

System and design testing and programming

• 10 tips for successful scan design: part one - gate counts increase at an enormous rate, the scan-design methodology is becoming necessary to produce high-quality chips
• 10 tips for successful scan design: part two - 10 design principles to follow for successful implementation of scan-test techniques
• In-system programmable logic simplifies prototyping to production - changing a programmable device so that it can be programmed in a system after the device is mounted on a pc board benefits prototype development, manufacturing, and field support
• Program ICs in your system via IEEE 1149.1 and enjoy the benefits throughout the system's life
• Simple boundary-scan techniques tackle sophisticated systems - If you think that boundary-scan techniques are old news, think again. Today's new packaging technology is forcing test engineers to revisit old technologies. Meanwhile, flash memories and deeply embedded systems are continuously driving boundary-scan developments.
• You need little more than a PC to test and program IEEE-1149.1-compliant ICs - if the products youre testing support boundary scan, expensive testers and extra equipment may even be unnecessary in production, you just need a simple adapter between your card and your PC

Clock generation and division

• Asynchronous circuit divides frequency by 1.5
• Counter provides divide-by-4.5 function - some VHDL code, a 9-bit shift register, and some OR gates produce a divide-by-4.5 circuit, you can can adapt the concept for other noninteger dividers
• Delay line implements clock doubler - using a 5-nsec delay unit, a 50- MHz, 50% duty-cycle square-wave input produces a 100-MHz, 50% duty-cycle output clock
• VHDL code implements 50%-duty-cycle divider - realizing a 50%-duty-cycle, divided-down clock is not always a trivial task, particularly when the divisor rate is an odd number but this example code will help youn in this task

Circuit design around FPGA chip

• Careful PCB Layout Enhances Onboard Programming - PCB design techniques that can help you effectively employ onboard programming to speed the production and test of products containing complex programmable-logic devices
• Circuit protects FPGAs from killer spikes
• High-end digital systems give a thumbs down to rules of thumb - lower voltages, higher current transients, and higher clock rates render rules of thumb uselsss for designing power-distribution-system decoupling networks

Computer interfacing

• Decoder safely drives data-bus buffer - a common way of implementing an I/O decoder for the ISA (or similar) bus
• Distributed-DMA techniques allow easy migration from the ISA bus to the PCI bus - a technique using distributed DMA offers upward compatibility for ISA-legacy devices in PCI-bus systems and provides a vast improvement in performance
• FPGA memory controller links embedded µP to cache-enhanced DRAM
• FPGAS: Implementing the PCI Interface
• FPGA transfers data on every clock cycle - static-RAM (SRAM) interface
• Shared-memory interface eliminates arbitration
• Use a CPLD to implement an SDRAM controller - SDRAM-controller designs need not be especially difficult

Telecommunication applications

• Fast, Inexpensive Prototyping of PLD's for SONET Apps - Time-to-market-pressures? Programmable logic devices may hold the magic combination of quick development, performance, and economics.

Other tips

• Create your own VGA system with Altera FPGA - Altera FPGA VGA synchronization for everyone
• Fast integer multipliers fit in FPGAs
• FPGA circuit emulates 74X74 flip-flop
• FPGA's tri-state buffers build 32x32 crossbar
• FPGA utility converts report file to OrCAD library part
• Integers out of sorts? Program an FPGA to put them in order - designing integer-sort algorithms into FPGAs isn't as difficult as you might think
• Look-ahead approach tames large FPGA counters - the T flip-flops and look-ahead technique allow you to program large, fast counters in FPGAs
• Modulator's design cuts FPGA's gate count - pulse-width modulator (PWM) macro requires only half as much logic as a conventional 2-counter design
• Priority encoders slip into FPGAs
• Simple monovibrator uses three PLD pins - if you can afford just three spare PLD pins, this circuit is an alternative to using yet another 555
• Verilog program models metastable flip-flop - HDL program allows you to simulate the behavior of a set-reset (SR) flip-flop that has both its set and reset inputs high simultaneously
• VGA Generator that displays an image in the XS Board RAM on a VGA monitor - example of using Virtex series FPGA to generate VGA signals

VHDL and other hardware description languages

Hardware description languages are essential tools for handling the increasing complexity of the hardware designs. Information on VHDL hardware description language that is used for designing logic circuits implemented with FPGA or ASIC technologies.

VHDL is a way of describing the desired operation of a logic device. Although it is a standard, vendors all choose different parts to implement and add their own quirks. In VHDL synthesis, we describe a program that would have the same behavior as the circuit we wish to create. This program is used by the synthesis tools to create the configuration file that will configure the specific FPGA or PLD into a correct circuit. The syntax is very similar to Ada.

General

• Design and Reuse Web site
• Getting a handle on HDLs - Programmable-logic chips and designs are growing more complex. As a result, you’ll sooner or later need to add HDL expertise to your skills if you want to keep hitting those project deadlines. For this Hands-On Project, I learn VHDL, complete a mixed logic and embedded-memory design in an FPGA, and share observations along the way.
• Interfacing HDLs with conventional programming languages - programming languages that interface with HDL models facilitate hardware/software codesign

VHDL

• 10 tips for generating reusable VHDL - Your ability to reuse blocks expressed in an HDL is critical to designing systems on chips. Here are some tips you can use to generate VHDL-based blocks that you and others can reuse in subsequent chip designs.
• HDL basic training: top-down chip design using Verilog and VHDL
• VHDL and Verilog fundamentals--expressions, operands, and operators - data objects in VHDL and Verilog form expression operands, knowing the operand differences between the two HDLs helps you write more efficient chip-design code
• VHDL and Verilog fundamentals--design entities, data types, and data objects
• VHDL emerges as a commercial design tool - despite the initial challenges imposed by VHDL, the language, born of the military, has made the commercial sector sit up and take notice
• VHDL Synthesis Tutorial

Verilog

• Simulating mixed-mode designs with Verilog-only models - PLL circuits offer developers of mixed-signal designs a unique challenge. Commonly used as frequency synthesizers, clock multipliers, or clock-recovery devices, PLLs are crucial to many microcontrollers and microprocessors. As more functions enter the digital domain, verification becomes more difficult and requires more sophisticated models. A Verilog-only model can solve most of these problems.
• Verilog FAQ
• Verilog Behavioral Simulator - software for Verilog simulation
• HDL basic training: top-down chip design using Verilog and VHDL
• VHDL and Verilog fundamentals--expressions, operands, and operators - data objects in VHDL and Verilog form expression operands, knowing the operand differences between the two HDLs helps you write more efficient chip-design code
• VHDL and Verilog fundamentals--design entities, data types, and data objects

Other languages

• CynApps Cynlib - C++ based hardware description language
• LavaLogic - Java-based synthesis tool
• SpecC
• Superlog - superset of Verilog, borrows features from VHDL and C++
• SystemC - modeling platform that enables, promotes and accelarates system-level co-design and IP exchange

Organizations

• EDA.ORG - dedicated to the support, open exchange and dissemination of in-development standards from EDA Industry Working Groups
• European Electronics Chips and Systems Design Initiative (ECSI)
• Gigascale Silicon Research Center Semantics Project
• The Free Model Foundation - created to promote the development and free distribution of simulation and analysis models of electronic components
• VHDL International - organization dedicated for promoting VHDL as a standard description language for electronics systems